Main Page Modules Alphabetical List Data Structures File List Data Fields Globals # IxDmaAcc.h Go to the documentation of this file.
    00001
    00054 /*---------------------------------------------------------------------
    00055    Doxygen group definitions
    00056   ---------------------------------------------------------------------*/
    00057
    00058 #ifndef IXDMAACC_H
    00059 #define IXDMAACC_H
    00060
    00061 #include "IxTypes.h"
    00062 #include "IxOsServices.h"
    00063 #include "IxNpeDl.h"
    00075 typedef enum
    00076 {
    00077     IX_DMA_SUCCESS = IX_SUCCESS,
    00078     IX_DMA_FAIL = IX_FAIL,
    00079     IX_DMA_INVALID_TRANSFER_WIDTH,
    00080     IX_DMA_INVALID_TRANSFER_LENGTH,
    00081     IX_DMA_INVALID_TRANSFER_MODE,
    00082     IX_DMA_INVALID_ADDRESS_MODE,
    00083     IX_DMA_REQUEST_FIFO_FULL
    00084 } IxDmaReturnStatus;
    00085
    00092 typedef enum
    00093 {
    00094     IX_DMA_COPY_CLEAR = 0,
    00095     IX_DMA_COPY,
    00096     IX_DMA_COPY_BYTE_SWAP,
    00097     IX_DMA_COPY_REVERSE,
    00098     IX_DMA_TRANSFER_MODE_INVALID
    00099 } IxDmaTransferMode;
    00100
    00107 typedef enum
    00108 {
    00109     IX_DMA_INC_SRC_INC_DST = 0,
    00110     IX_DMA_INC_SRC_FIX_DST,
    00111     IX_DMA_FIX_SRC_INC_DST,
    00112     IX_DMA_FIX_SRC_FIX_DST,
    00113     IX_DMA_ADDRESSING_MODE_INVALID
    00114 } IxDmaAddressingMode;
    00115
    00122 typedef enum
    00123 {
    00124     IX_DMA_32_SRC_32_DST = 0,
    00125     IX_DMA_32_SRC_16_DST,
    00126     IX_DMA_32_SRC_8_DST,
    00127     IX_DMA_16_SRC_32_DST,
    00128     IX_DMA_16_SRC_16_DST,
    00129     IX_DMA_16_SRC_8_DST,
    00130     IX_DMA_8_SRC_32_DST,
    00131     IX_DMA_8_SRC_16_DST,
    00132     IX_DMA_8_SRC_8_DST,
    00133     IX_DMA_8_SRC_BURST_DST,
    00134     IX_DMA_16_SRC_BURST_DST,
    00135     IX_DMA_32_SRC_BURST_DST,
    00136     IX_DMA_BURST_SRC_8_DST,
    00137     IX_DMA_BURST_SRC_16_DST,
    00138     IX_DMA_BURST_SRC_32_DST,
    00139     IX_DMA_BURST_SRC_BURST_DST,
    00141     IX_DMA_TRANSFER_WIDTH_INVALID
    00142 } IxDmaTransferWidth;
    00143
    00149 typedef enum
    00150 {
    00151     IX_DMA_NPEID_NPEA = 0,
    00152     IX_DMA_NPEID_NPEB,
    00153     IX_DMA_NPEID_NPEC,
    00154     IX_DMA_NPEID_MAX
    00155 } IxDmaNpeId;
    00156 /* @} */
    00169 typedef UINT32 IxDmaAccRequestId;
    00170
    00179 #define IX_DMA_REQUEST_FULL 16
    00180
    00188 typedef void (*IxDmaAccDmaCompleteCallback) (IxDmaReturnStatus status);
    00189
    00202 PUBLIC IX_STATUS
    00203 ixDmaAccInit(IxNpeDlNpeId npeId);
    00204
    00243 PUBLIC IxDmaReturnStatus
    00244 ixDmaAccDmaTransfer(
    00245     IxDmaAccDmaCompleteCallback callback,
    00246     UINT32 SourceAddr,
    00247     UINT32 DestinationAddr,
    00248     UINT16 TransferLength,
    00249     IxDmaTransferMode TransferMode,
    00250     IxDmaAddressingMode AddressingMode,
    00251     IxDmaTransferWidth TransferWidth);
    00264 PUBLIC IX_STATUS
    00265 ixDmaAccShow(void);
    00266
    00267 #endif /* IXDMAACC_H */
    00268
Automatically generated from sources. © Intel Corp. 2003